High Performance Timing

Ultra-low Jitter Fractional-N Synthesizer Technology

Internet traffic is expected to reach 2.3 Zettabytes (2.3 Billion Terabytes) by year 2020. To meet this demand, there is a need to upgrade all communication networks. Ultra-low Jitter clocking solutions are essential to meet these performance requirements. Aura has developed sub 100fs jitter technology that forms the basis of high performance timing solutions.

Key Specifications of Aura's Timing Solutions

Low Noise Fractional-N PLL Technology

  • 100 fs typical integrated rms jitter performance (12 KHz to 20 MHz frequency offset)

Highly Programmable Outputs

  • Multi-PLLs supporting multiple outputs
  • Versatile output standards support (LVPECL, LVDS, CML, HCSL, LVCMOS)
  • Wide output frequency range (1 pps to 2.1 GHz)

Flexible Input Support

  • Multiple references supported ( fundamental / third overtone crystals, OCXO / TCXO inputs)
  • Hitless switching between inputs, programmable holdover modes
  • Flexible jitter attenuation bandwidths